Integer Gate Logic (IGL): Benchmark Results and the Case for a New Class of Efficient AI Architectures
Rethinking the Relationship Between Model Size, Accuracy, and Computational Efficiency
Modern artificial intelligence has achieved extraordinary results through increasingly sophisticated neural networks, gradient-based optimization, and high-performance computing hardware. However, much of this progress has been accompanied by growing demands for parameter storage, memory bandwidth, processing capacity, and electrical power.
Integer Gate Logic (IGL), a patented machine-learning technology developed by MLiglon Corporation, explores a fundamentally different approach: constructing highly compact, integer-native computational networks capable of learning complex classification functions without conventional backpropagation.
The central research question is straightforward but consequential:
How much predictive capability can be represented using a small number of low-precision, discretely optimized computational parameters?
IGL benchmark studies suggest that the answer may be substantially different from what conventional floating-point neural network designs might imply.
Across handwritten digit recognition, noisy synthetic images, news classification, ontology classification, and radio-frequency modulation recognition, IGL has demonstrated competitive—and in several reported comparisons superior—classification accuracy using substantially less parameter storage.
Particularly noteworthy are experiments reporting approximately 40-fold model-size reduction and 13-fold inference acceleration on DBpedia, approximately fourfold parameter-storage reduction on MNIST, and substantial improvements in the accuracy-versus-memory tradeoff for RF signal classification.
These results motivate further investigation into discrete representations as a practical alternative to exclusively gradient-trained models.
1. The IGL Architecture: Integer-Native Computation Without Backpropagation
Conventional artificial neural networks commonly represent learned relationships through floating-point weights, affine transformations, and differentiable activation functions. Their parameters are adjusted by computing gradients of a loss function and propagating derivatives backward through the network.
IGL instead uses networks of discrete computational nodes whose behavior is determined by integer-valued parameters and logic-oriented activation functions.
The reported implementations incorporate several distinguishing characteristics.
Discrete parameter representations. IGL implementations use compact one-byte and two-byte integer parameters, depending on the experiment. This reduces the storage required per parameter compared with conventional FP32 representations.
Non-differentiable computational functions. IGL nodes can implement Boolean-like and nonlinear decision behavior without requiring differentiable activation functions. The architecture therefore supports functions that do not naturally fit conventional gradient-based optimization.
Chain isolation optimization. Rather than propagating gradients across an entire computational graph, IGL investigates parameter changes through isolated computational paths and local assessments of their effects on prediction error.
Sparse and structured connectivity. IGL can organize computations through interconnected nodes without necessarily requiring dense weight matrices between successive layers.
Potential lookup-table implementation. Integer operations and discrete node functions can, where practical, be implemented through compact lookup tables or integer arithmetic, providing opportunities for specialized hardware acceleration.
These properties are significant because IGL is not simply a floating-point network converted to lower precision after training. Its discrete representation and optimization strategy are fundamental architectural choices.
The benchmark program evaluates whether these choices can improve parameter efficiency while preserving the expressive capability required for practical classification tasks.
2. Benchmark Results at a Glance
The following results are drawn from MLiglon’s reported benchmark studies. Comparisons are specific to the implementations and evaluation procedures described in those studies.
These results should not be interpreted as one universal performance multiplier. They come from different experimental configurations, parameter precisions, datasets, and baseline implementations. Nevertheless, the recurring pattern—high accuracy from comparatively small integer-native models—makes the architecture worthy of closer examination.
3. MNIST and EMNIST: Strong Accuracy With Extremely Small Models
MNIST and EMNIST provide useful initial tests of whether a learning architecture can represent nonlinear image-classification functions efficiently.
In the July 2025 MNIST comparison, an IGL model using 9.537 KB of one-byte parameters achieved 99.28% final-test accuracy.
A backpropagation-trained FP32 network using approximately 37.908 KB achieved 99.22%. A smaller FP32 baseline using 12.636 KB achieved 98.58%.
The result is interesting for two reasons.
First, the IGL model achieved comparable accuracy while requiring approximately one-quarter of the parameter storage of the larger FP32 network.
Second, reducing the conventional model’s parameter budget produced a measurable accuracy decline, whereas the compact IGL representation retained strong performance.
The EMNIST digit comparison showed a similar pattern. An IGL model using approximately 9.537 KB achieved 99.26%, compared with 99.12% for a larger FP32 network using approximately 38.18 KB.
A still smaller FP32 configuration, using roughly the same storage budget as IGL, achieved 98.35%.
For an engineer designing models under strict memory limitations, this distinction matters more than a marginal difference at the third decimal place.
The important result is the accuracy obtainable within a fixed storage budget.
The reported differences in accuracy are modest, and establishing statistical superiority would require repeated trials and confidence intervals. However, the storage-efficiency advantage is large enough to motivate direct comparison with modern quantized and sparsified neural networks.
4. Noise100: Evidence of Robustness Under Input Corruption
The Noise100 experiment extends the investigation beyond relatively clean handwritten-digit datasets.
Its synthetic images incorporate transformations such as scaling, rotation, and translation, together with randomly added or subtracted pixel noise.
This provides a controlled environment for investigating how learned representations respond when input patterns become less distinct.
The reported IGL model achieved 99.91% final-test accuracy using 9.537 KB, compared with 99.72% for a conventional FP32 model using 37.908 KB.
The result suggests that the tested discrete representation can preserve useful classification boundaries even when substantial pixel perturbations are introduced.
One possible explanation is that logic-oriented nodes can learn decision regions less dependent on small numerical variations in individual features.
That explanation remains a hypothesis requiring targeted experimentation. Robustness depends on the noise distribution, feature representation, training procedure, and classification task.
Nevertheless, the practical research opportunity is compelling.
For industrial sensing, robotics, communications, and embedded vision, input data is frequently imperfect. A compact architecture that maintains useful discrimination under corruption could reduce both hardware requirements and the need for expensive preprocessing.
The next important experiments would measure accuracy across progressively increasing corruption levels, unseen noise distributions, and transformations not represented during training.
5. AG News: Compact Models for Natural Language Classification
Text classification introduces different challenges from image recognition.
Rather than recognizing spatial patterns, a model must distinguish semantic categories using representations of words, phrases, and document content.
The AG News Corpus includes 120,000 training examples and 7,600 test examples distributed across four categories: World, Sports, Business, and Science/Technology.
The September 2025 IGL study reported 94.37% accuracy using four integer networks containing a combined 123,300 one-byte parameters.
Reported per-category accuracies included 94.32% for World, 97.67% for Sports, 92.45% for Business, and 93.04% for Science/Technology.
These results indicate that compact IGL networks can distinguish meaningful topic-related information in textual input representations.
A subsequent October 2025 study examined a different IGL configuration containing 30,204 two-byte parameters, occupying approximately 0.060 MB.
That experiment reported 94.57% average test accuracy, compared with 94.22% for a PyTorch/CUDA baseline containing 353,851 FP32 parameters and occupying approximately 1.415 MB.
The resulting reported storage reduction was approximately 23.4-fold.
The October study additionally reported average training times of 24.2 seconds for IGL versus 873.2 seconds for the tested PyTorch implementation, representing an approximately 36-fold difference in that experimental environment.
For researchers, these observations raise important questions concerning sparse semantic representations, discrete optimization, and the computational work required to learn effective decision boundaries.
The training-time result is implementation-specific; it should not be generalized to every optimized PyTorch architecture or training procedure. Even so, it provides a strong motivation for reproducible performance studies under standardized conditions.
6. DBpedia: A Particularly Compelling Accuracy–Memory–Latency Comparison
Among the reported experiments, the December 2025 DBpedia benchmark provides one of the clearest demonstrations of IGL’s potential.
DBpedia contains 560,000 training samples, 70,000 test samples, and 14 ontology categories, including Company, Artist, Athlete, Building, Animal, and WrittenWork.
The conventional PyTorch implementation used four hidden layers, each containing 20 nodes, with ReLU activations and 353,851 FP32 parameters.
Its reported model storage was 1,415,404 bytes, with 97.56% test accuracy.
The corresponding IGL implementation used a sparse configuration containing 10,068 nodes. Its reported parameter storage consisted of 5,068 internal nodes with three two-byte parameters each, plus 5,000 one-byte input-node values.
The resulting storage requirement was just 35,408 bytes.
Despite this dramatic reduction, IGL achieved 97.61% accuracy.
The reported performance comparison was:
Both inference measurements were reported for processing the test set on the same NVIDIA RTX 4090 GPU platform.
The resulting ratios were approximately 40× less parameter storage and 13.33× lower measured inference time.
These are unusually attractive engineering tradeoffs for a classification system operating near 98% accuracy.
Importantly, the class-by-class results also showed broad parity rather than an improvement restricted to one ontology category.
The inference measurements represent the reported benchmark workloads, not independently established single-request latency or guaranteed deployment performance. They nevertheless suggest that the benefits of compact discrete computation may extend beyond storage into execution efficiency.
For AI researchers, DBpedia offers a concrete opportunity to investigate how much semantic classification capacity can be encoded in a small, sparsely connected discrete model.
7. RF Modulation Recognition: High-Dimensional Classification Under Noise
Radio-frequency modulation recognition presents a demanding application involving noisy signals, changing channel conditions, and subtle differences between modulation schemes.
The RML2018.01A studies examined 24 modulation types, including ASK, PSK, APSK, QAM, AM, FM, GMSK, and OQPSK.
One experimental pipeline converted complex in-phase/quadrature samples into 200 × 200 histogram representations, producing 40,000 input features.
This substantial input dimensionality makes the task especially relevant to questions of parameter efficiency.
At +8 dB signal-to-noise ratio, an IGL configuration using approximately 0.24 MB of two-byte parameters reported 99.70% average one-vs-rest classification accuracy. A larger FP32 baseline using approximately 1.92 MB reported 98.65%.
The study also presented target-class recognition metrics, averaging 93.01% for IGL versus 66.39% for the larger FP32 baseline.
These target-class results are especially informative because one-vs-rest accuracy can be inflated when most evaluation samples belong to other categories.
A separate experiment at 0 dB SNR, where signal and noise powers are equal under the conventional SNR definition, reported 99.43% average one-vs-rest accuracy for a 0.121 MB IGL model versus 98.66% for a 5.762 MB FP32 baseline.
In that study, the target-class-focused metric averaged 85.97% for IGL and 67.90% for the conventional model.
These results are promising evidence that compact IGL models can learn useful discrimination functions from heavily corrupted signal representations.
They also illustrate why rigorous evaluation requires more than a single overall accuracy number.
Independent multiclass accuracy, balanced accuracy, precision, recall, confusion matrices, and tests across unseen signal conditions are essential for determining operational usefulness.
Future validation should also examine independent transmitters, channel realizations, signal captures, and preprocessing pipelines to establish how well the learned representations generalize beyond the original experimental conditions.
8. Why Parameter Storage Matters Beyond Model Size
The reduction in parameter storage has consequences beyond the size of a model file.
Smaller parameters can reduce data transfers between processor cores and memory, improve cache residency, simplify model distribution, and make deployment feasible on processors with limited on-chip storage.
For example, an approximately 35 KB parameter representation offers very different embedded deployment opportunities from a model requiring approximately 1.4 MB.
Similarly, a 121 KB integer model can be attractive for microcontrollers, digital signal processors, and specialized accelerators that support efficient low-precision arithmetic.
However, parameter storage is not the same as total runtime memory. A complete implementation must also account for connectivity metadata, intermediate activations, input buffers, preprocessing, program code, and other working storage.
The real engineering objective is therefore to minimize total application resources while meeting accuracy and latency requirements.
IGL’s reported parameter-storage reductions provide an encouraging starting point for that optimization.
9. Integer Arithmetic, Inference Latency, and Energy Efficiency
IGL’s integer-native architecture aligns with important developments in computer hardware.
Modern CPUs, embedded processors, DSPs, and AI accelerators support a variety of efficient integer operations, including packed arithmetic and SIMD instructions.
A computational model that naturally uses INT8 or INT16 values may require less memory traffic than an FP32 implementation and may map efficiently onto suitable integer execution units.
Compact logic-oriented functions may also support specialized lookup-table implementations.
These characteristics create opportunities for reducing inference latency, improving throughput, and lowering energy consumption.
Yet arithmetic precision alone does not determine performance.
Actual speed and energy depend on the number of operations, control-flow behavior, memory access patterns, vectorization efficiency, hardware support, and implementation quality.
The benchmark reports provide measured latency advantages for selected implementations, particularly the DBpedia experiment. They do not establish a universal energy-reduction factor across all processors.
Direct energy measurements on representative ARM microcontrollers, DSPs, GPUs, and other deployment platforms would therefore be an especially valuable next stage of IGL research.
10. Scaling, Model Compression, and New Research Questions
A recurring observation across the benchmark studies is that IGL’s parameter-storage advantage remains substantial as the experiments move from handwritten digits toward larger input representations and more complex classification domains.
The associated scaling analysis proposes that discrete node structures may offer favorable parameter-growth characteristics relative to particular dense neural network architectures.
This is an important research hypothesis, but a universal asymptotic scaling law cannot be established from a small collection of different datasets and baseline architectures.
Model parameter requirements depend on architecture, task complexity, representation quality, sparsity, and target accuracy—not simply whether a model uses backpropagation.
The most productive research direction is consequently to investigate accuracy as a function of model storage, runtime memory, inference computation, training computation, and increasing task complexity.
Such studies could establish whether IGL provides consistent advantages against carefully optimized convolutional, quantized, sparse, and other low-precision models.
There are also opportunities to investigate how discrete nodes could be integrated into convolutional architectures, hybrid neural-symbolic systems, and learned feature-processing pipelines.
The central attraction is not merely replacing an existing training algorithm. It is exploring a different design space for representing learned computation.
11. Why IGL Deserves Further Investigation
For researchers and engineers, the most interesting aspect of IGL is the combination of architectural novelty and measurable benchmark performance.
First, the architecture challenges the assumption that high predictive accuracy necessarily requires large floating-point parameter representations. Across multiple studies, compact integer models achieved strong accuracy at substantially smaller storage budgets.
Second, IGL provides a different optimization framework. Chain isolation and discrete parameter selection introduce opportunities to investigate learning without conventional gradient propagation.
Third, the architecture is hardware-oriented by construction. Small integers, compact nodes, sparse connectivity, and potential lookup-table execution are directly relevant to embedded inference and specialized accelerators.
Fourth, the benchmark results span multiple data modalities. Vision, text, and RF classification provide different computational challenges, making the recurring efficiency advantages worthy of systematic investigation.
Fifth, IGL offers a substantial experimental research agenda. Theoretical analysis, independent replication, architecture scaling, pruning, robustness, convolutional extensions, hardware mapping, and hybrid learning strategies could all help establish where the method is most effective.
These opportunities are especially relevant to Edge AI, TinyML, robotics, intelligent sensing, wireless communications, industrial monitoring, and other systems in which memory, latency, and energy requirements constrain model design.
Conclusion: Toward More Efficient Representations of Learned Intelligence
The central message of the IGL benchmark program is that competitive predictive performance does not always require the large floating-point parameter structures commonly associated with conventional neural networks.
The reported results demonstrate that carefully designed integer-native networks can achieve strong classification accuracy with substantially smaller parameter representations and, in selected studies, significantly lower measured inference or training time.
The DBpedia benchmark is particularly noteworthy: approximately 40× less parameter storage, approximately 13× faster reported inference, and essentially unchanged classification accuracy.
The MNIST, EMNIST, AG News, Noise100, and RF experiments further suggest that discrete learning architectures can remain effective across different input representations, classification problems, and noise conditions.
These findings do not establish that IGL universally outperforms modern deep-learning architectures or that results will automatically extend to large language models and generative AI. Those questions require additional controlled research.
They do, however, provide a compelling foundation for investigating a different class of machine-learning systems—systems designed around compact representations, discrete optimization, and efficient integer computation.
For AI researchers, hardware engineers, and organizations seeking to expand the practical limits of efficient machine learning, Integer Gate Logic offers a promising and technically distinctive direction for further exploration.
Research documentation
The reported results are drawn from MLiglon Corporation’s 2025 Integer Gate Logic benchmark studies associated with U.S. Patent 12,242,946-B1, including:
- MNIST Benchmark Comparison Study, July 14, 2025.
- EMNIST Benchmark Comparison Study, June 26, 2025.
- Noise100 Benchmark Comparison Study, July 15, 2025.
- AG News Corpus Benchmark Study, September 22, 2025.
- AG News Speed, Memory, and Accuracy Benchmark, October 12, 2025.
- DBpedia Ontology Classification Benchmark, December 31, 2025.
- RML2018.01A RF Modulation Benchmark, August 10, 2025.
- RML2018.01A SNR +00 dB Benchmark, August 14, 2025.
- Integer Gate Logic Scaling Results Study, September 1, 2025.
Benchmark figures are reported results from MLiglon’s research studies, not claims of independent third-party replication. Performance comparisons reflect the specified architectures, datasets, precision formats, implementations, and evaluation conditions. Additional independent benchmarking is appropriate before generalizing these results to other workloads or hardware.